1. Field of the Invention
The present invention relates to a clock extracting method and an apparatus thereof for stably extracting, from a signal light for an optical communication, in particular, a signal light at a bit rate higher than a working speed limit of an electronic circuit, a synchronous clock of a frequency which is 1/N(N: positive integer, the same rule will be applied hereafter) of the bit rate of the signal light
2. Description of the Related Art
In recent years, with an increase of channel capacity in an optical communication, research and development have been actively performed in the technology of optical time division multiplexing (OTDM) for increasing the capacity per one wavelength, as well as in the technology of wavelength division multiplexing (WDM) for demultiplexing optical signals into a plurality of wavelengths. An OTDM system multiplexes optical signals of pulse widths narrower than bit intervals in the time domain, to increase the transmission capacity per one wavelength. In this type of OTDM system, the short pulse generating technology is important. Up to this date, the fiber transmission of a signal light obtained by multiplexing short pulsed lights with periods from picoseconds to subpicoseconds has been realized, and the OTDM system having the highest multiplicity obtains 1.28 terabit per one second. Such an OTDM technology is expected to realize an increase of channel capacity and also to be applied to the ultra-high speed signal processing using broadband characteristics thereof.
As one of basic signal processing technologies in optical communications, there is a clock extracting technology. For example, the communication cannot be performed without extracting a clock synchronized with a signal light in a receiver. Generally, the technology for extracting a clock from a signal light depends on an electronic circuit as shown in FIG. 10. Namely, at first, a signal light at B(b/s) bit rate is converted into an electric signal by a photoelectric converter 100, and next, an electric clock of frequency B(Hz) same as a modulating rate of the signal light is extracted by an electric circuit 101. In the electric circuit 101, there is used a method of extracting only a clock component of frequency B(Hz) by an electric filter having a narrow band transmission characteristic or a method of generating a clock synchronized with a signal by a voltage controlled oscillator (VCO). This method has features of simple configuration and stable operation, and therefore, an apparatus for extracting a synchronous clock from a signal light of up to about 10 Gb/s bit rate is utilized in an actual system. However, the clock extracting method described above has a problem in that the synchronous clock cannot be extracted from a signal light having a band of working speed limit, generally about 50 GHz or above, of the electronic circuit.
To solve the above problem, as shown in FIG. 11 for example, an electro-optical gate 102 capable of controlling the transmittance of a light with an electric signal is used as an optical switch, so that a clock can be extracted from a signal light at a higher bit rate. According to this method, at first, the electro-optical gate 102 is driven with an electric clock of frequency B(Hz), and a signal light at N×B(b/s) bit rate is time division demultiplexed to signal lights at B(b/s) bit rate. Note, the time division demultiplexing is to demultiplex signal lights contained in a time division multiplexed light in the time domain. The electric clock used at this time is the one which is electronically extracted from the demultiplexed signal light by the above described photoelectric converter 100 and the electronic circuit 101 to be fed back via a splitter 103. As a result, a phase locked loop (PLL) is constituted, to be stably operated if the extracted electric clock is synchronized with the signal light. The method of highest speed realized up to this date by such a clock extracting method uses an electro-absorption (EA) modulator for the electro-optical gate 102, and extracts a synchronous clock of 40 GHz (or 10 GHz) from a signal light at 160 Gb/s bit rate (refer to literature 1: D. T. K. Tong et al., “160 GBIT/S CLOCK RECOVERY USING ELECTROABSORPTION MODULATOR-BASED PHASE LOCKED LOOP” Electronics Letters, Vol. 36, No. 23, 2000, pp. 1951-1952).
Further, if an optical gate responding at a higher speed is prepared as the optical switch, it becomes possible to extract the synchronous clock from the time division multiplexed signal light at a higher bit rate. If an optic-optical gate of total optics, which controls the transmittance of a signal light with a light, is combined with a short pulsed light, an optical switch of a higher speed according to the pulse width of short pulse can be realized. Namely, it becomes possible to gate a signal light at a higher bit rate. According to the theory same as that in the clock extracting method using the electro-optical gate 102 shown in FIG. 11, as shown in FIG. 12 for example, it is possible to drive an optic-optical gate 104 with a short pulsed light to separate a signal light, and then to extract a clock from the separated signal light by the above described photoelectric converter 100 and the electronic circuit 101. In this case, a short pulsed light source 105 is driven with the extracted electric synchronous clock, and the optic-optical gate 104 is controlled with the generated short pulsed light (optical clock), thereby constituting the PLL. According to the clock extracting method using such an optic-optical gate 104, up to this date, a clock of 6.3 GHz is successfully extracted from a signal light at 400 Gb/s bit rate (refer to literature 2: Osamu Kamatani et al. “Prescaled Timing Extraction from 400 Gb/s Optical Signal Using a Phase Lock Loop Based on Four-Wave-Mixing in a Laser Diode Amplifier”, IEEE PHOTONICS TECHNOLOGY LETTERS, VOL. 8, NO. 8, AUGUST 1996, pp 1094-1096).
However, in the clock extracting method using the electro-optical gate shown in FIG. 11, since the working speed thereof is limited at a response speed limit of the electro-optical gate, an application limit of the clock extracting method is a signal light at 160 Gb/s bit rate, and it is extremely hard to apply the clock extracting method to a signal light at a bit rate higher than 160 Gb/s. On the other hand, in the clock extracting method using the optic-optical gate shown in FIG. 12, it is possible to extract the electric clock from a signal light of ultra-high speed exceeding 160 Gb/s bit rate. However, since a short pulsed light source of large scale and complicated configuration is needed, there is caused a problem in that the large scaling and complication of the clock extracting apparatus itself is unavoidable. To be specific, the pulse width of the short pulsed light used in the literature 2 is about picoseconds. Since a short pulsed light source stably generating such a short pulse includes a stabilization circuit, a control circuit and the like, the large scaling of the apparatus is unavoidable.